Talk:NVM Express

Computing Mid‑importance

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History

Currently the final paragraph in the History section is just copied directly from the source. It does not fit with the rest of the article at all and really doesn't provide any useful information. I propose it be removed entirely from the article. Hippiemancam (talk) 04:26, 19 June 2019 (UTC)[reply]

Comparison table

The comparison table between NVMe and AHCI is misleading. It talks about register accesses costing 2000 cycles each, but only reads cost 2000 cycles; writes are posted and cost only a single cycle (or less) each. I'm not sure how best to convey this information in the comparison table. NVMe does at most two writes per I/O and will only do reads under exceptional circumstances (eg card initialisation, attempting to recover from some hard errors).

The comparison is further misleading as multiple commands may be submitted with a single write (not currently implemented in the Linux driver) and multiple responses may be acknowledged with a single write (is implemented). So we may amortise the number of writes per I/O to be less than 1. The problem described in the first paragraph is more important though.

MatthewWilcox (talk) 20:11, 5 November 2013 (UTC) (author of the Linux NVMe driver)[reply]

Uhh, I would like to fix the article, but this is very specialized, and I worry that I should not be writing about things I do not understand :P. So if I understand you correctly, writes are asyncroneous "send and forget", with not round-trip wait penalty, since the driver is not reading the result in a register? How does the driver know whether write succeeded then? Thue (talk) 21:48, 5 November 2013 (UTC)[reply]

@MatthewWilcox

Hello there! It's so awesome to have you here. :) For the beginning, how about removing "(2000 cycles each)" from the table heading, or replacing it with something like "(2000 cycles per read)"? -- Dsimic (talk) 21:52, 5 November 2013 (UTC)[reply]

Organization?

The subtitle reads organization. Isn't NVMe a specification? — Preceding unsigned comment added by 24.209.105.115 (talk) 21:17, 24 May 2017 (UTC)[reply]

"...the number of uncacheable register accesses"

What is an "uncacheable register accesses"? Indeed, what in this context is a "register access"? Presumably it's nothing to do with cpu registers, so what's it about? Any links would be appreciated too. thanks 79.75.100.33 (talk) 18:09, 2 October 2016 (UTC)[reply]

NVME over fabrics standard missing

The page lists in the background section "As of September 2014, a new standard for using NVMe over Fibre Channel (FC) is also in development.[8]" however the "NVME over fabrics" standard \(http://www.nvmexpress.org/wp-content/uploads/NVMe_over_Fabrics_1_0_Gold_20160605.pdf ) released on June 9 2016 ( http://www.nvmexpress.org/nvm-express-over-fabrics-specification-released/ ) not only discusses NVME over FC, but also NVME over RDMA where RDMA is provided by either Ethernet or Infiniband. — Preceding unsigned comment added by Hansklu (talk • contribs) 11:40, 17 October 2016 (UTC)[reply]

External links modified (February 2018)

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Storage_Stack_Diagram is broken

http://en.wiki.x.io/wiki/NVM_Express#/media/File:The_Linux_Storage_Stack_Diagram.svg When the diagram is clicked it zooms correctly, but all the text is missing. 108.230.167.72 (talk) 09:59, 12 March 2024 (UTC)[reply]