Draft:Stefan Cserveny
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Stefan Cserveny | |
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| Born | Stefan Alexandru Cserveny January 14, 1941 Resita, Romania |
| Died | January 27, 2025 (aged 84) Lausanne, Switzerland |
| Alma mater | |
| Scientific career | |
| Institutions |
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Stefan Cserveny was born in Resita, Romania, on January 14, 1941; died peacefully at his home in Lausanne, on January 27, 2025, at 10:30am, aged 84.
Engineering career
[edit]He received in 1962 the Dipl. Ing. degree in electronics from the Polytechnical Institute of Bucharest, Romania, and in 1973 the M.S. degree in electrical engineering from the University of California, Berkeley.
Between 1962 and 1979 he lectured on electronic devices and circuits at the Polytechnica Institute of Bucharest and at the Telecommunications Institute of Oran, Algeria, writing several textbooks and papers.
In 1979 he joined the Centre Electronique Horloger S.A. (CEH) in Neuchatel, Switzerland, which in 1984 became the Centre Suisse d’Electronique et de Microtechnique (CSEM), where he was involved in device modeling, analog circuit design for intelligent sensors, and EEPROM memories.
Publications and Patents
[edit]H.J. Oguey and S. Cserveny, ‘Modele du transistor MOS valable dans un grand domaine de courants’, Bull. SEW VSE, Feb.1982
H.J. Oguey and S. Cserveny, ‘MOS modelling at low current density’, Summer Course on “Process and Device Modelling,” ESAT Leuven-Heverlee, Belgium, June 1983.
S. Cserveny, ‘Closed Form Expression MOS Transistor Model for Analog Circuit Simulations’ in “LOW POWER DESIGN A Collection of CSEM Papers” edited by E. Vittoz, E Dijkstra and D. Shields for Electronic Design Magazine Books Division in 1995.
[1], "US5485116A" Power Diverting Circuit: This invention concerns a power diverting circuit designed to create a supply voltage for a signal processing circuit from a source of data signals, each having a high or low potential corresponding to a first or second logic state.
[2], "US6366504B1" Random Access Memory: This patent relates to static random access memories (SRAM), detailing a matrix formed of columns and rows of memory.
Sources
[edit]En hommage à Stefan Alexandru Cserveny